JEDEC Standard No. 51-4A Page 22 References This document contains the guideline for thermal test chip design as a subset of JEDEC methodology for component package thermal measurement. The associated details of test method, environment and test board are given in JEDEC documents [1] - [4]. It is also recommended to read the SEMI test standards ([5] - [9]) and the related documents [10] - [12].[1] JESD 51, Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Device)[2] JESD 51-1, Integrated Circuit Thermal Measurement Method - Electrical Test Method (Refer to Annex A for a list of terminology and symbols applicable to this document).[3] JESD 51-2, Integrated Circuit Thermal Test Method, Environmental Conditions - Natural Convection[4] JESD 51-12, Guidelines for Reporting and Using Electronic Package Thermal Information[5] JC-15- Low Thermal 95-63, Conductivity Test Board for Leaded Surface Mount Packages.[6] SEMI Test Method #G43-87, Test Method, Junction-To-Case Thermal Resistance Measurements of Molded Plastic Packages.[7] SEMI Test Method #G38-87, Still and Forced Air-to-Ambient Thermal Resistance Measurements of Integrated Circuit Packages.[8] SEMI Test Method #G42-88, Specification, Thermal Test Board Standardization for Measuring Junction-to-Ambient Thermal Resistance of Semiconductor Packages.[9] SEMI Test Method #G30-88, Junction-to-Case Thermal Resistance Measurements of Ceramic Packages.[10] SEMI Test Method #G32-86, SEMI Guideline for Unencapsulated Thermal Test Chip.[11] EIA JEDEC EB-20, Accepted Practices for Making Microelectronics Device Thermal Characteristics Test.[12] Mil Std 883C Method 1012.1, Thermal Characteristics of Microelectronics Devices.[13] NIST Special Publication 400-86, Semiconductor Measurement Technology: Thermal Resistance Measurements. JEDEC Standard No. 51-4APage 33 Test Chip Design The thermal test chip should be designed to provide uniform or non-heating across the chip surface, and chip temperature sensing. The general design and construction of the thermal test chip includes these basic features: heating source, temperature sensor, and mounting approach. The components of a test chip are discussed as follows.3.1 Heating SourceResistor elements or transistors should be used as heating sources. The heating power (PH) is calculated as follows:PH = VH X IH (1)Where: VH = voltage across the heating source (V) IH = current for the heating source (A)When resistor heating is utilized, the resistance temperature dependence has to be considered in order to set the power supply. If the heater resistance is implemented in a semiconductor structure, the resistance will vary significantly with temperature (typically ≥3% over a 100 ºC range), thus requiring at each measurement point adjustment of either VH or IH and monitoring the other because they are dependent on each other. However, if the heater resistance is implemented with a deposited metal film of certain materials, the resistance temperature variation is small enough (typically ≤1% over a 100 ºC range) that the power dissipation only has to be set once for all the measurement points. If the heating resistor is implemented with metal films of materials with high resistance temperature variation, then the heating power supply will have to be adjusted during the measurement to maintain a constant power or the power will have to be measured at the time value of interest. The resistance value should be chosen to limit the current for maximum power dissipation consistent with the current handling capability of the on- chip metal traces and to minimize the Joule heating in those traces. The exact value of Unit Cell resistor(s) is determined by the chip design, fabrication technology, and the selection of resistor material.When a transistor is used, both VH and IH can be adjusted separately. Therefore, the heater power dissipation is easy to control but at the expense of more complex power dissipation control circuitry. For this reason, a transistor is preferred in certain transient applications and when extremely tight control of power levels (typically ≤0.5%) is required. However, due to the way transistors are designed, it is difficult to obtain uniform power distribution with a large transistor. Hence, for a large single uni