The total SRAM capacity (Spmat+Ptr+Act) of each EIE PE is 162KB. The activation SRAM is 2KB storing activations. The Spmat SRAM is 128KB storing the compressed weights and indices. Each weight is 4bits, each index is 4bits. Weights and indices are grouped to 8bits and addressed together. The Spmat access width is optimized at 64bits. The Ptr SRAM is 32KB storing the pointers in the CSC format. In the steady state, both Spmat SRAM and Ptr SRAM are accessed every 64/8=8cycles. The area and power is dominated by SRAM, the ratio is 93% and 59% respectively. Each PE is 0.638mm2 consuming 9.157mW. Each group of 4 PEs needs a LNZD unit for nonzero detection. A total of 21 LNZD units are needed for 64 PEs (16+4+1 = 21). Synthesized result shows that one LNZD unit takes only 0.023mW and an area of 189um2, less than 0.3% of a PE.